1. Technical Field
The present invention relates to a display device using a display panel, such as an organic electro-luminescence (EL) panel, or the like. The invention also relates to an electronic apparatus including such a display device, or the like.
2. Related Art
In recent years, various proposals have been made of a display panel using a light emitting element, such as an organic light emitting diode (hereinafter referred to as an (organic light emitting diode (OLED)), or the like. In such a display panel, pixel circuits, each of which includes a light emitting element, a transistor, and the like, are disposed correspondingly to pixel positions at which scanning lines and data lines intersect. Also, a display device (Si-OLED) in which a drive circuit, and the like are mounted on a silicon backplane of a display panel is also being developed.
In an Si-OLED, a plurality of latch circuits, a plurality of digital-to-analog converters (DACs), and a plurality of amplifiers, and the like are mounted on a silicon chip that constitutes a silicon backplane. The grayscale data for one line, which was latched by the plurality of latch circuits, is converted into a plurality of analog signals by the plurality of DACs. Further, the plurality of analog signals are amplified by the plurality of amplifiers so that a plurality of grayscale signals are generated. The grayscale signals are used for driving a plurality of data lines of the display panel.
Also, a plurality of (about 3 to 18) data lines are sometimes driven by one amplifier in time division. This drive method is referred to as a demultiplexer driving method. By the demultiplexer driving method, it is possible to reduce the number of DACs and amplifiers compared with the case of providing a DAC and an amplifier for each data line.
In the demultiplexer driving method, it becomes necessary to have a data latch circuit that captures grayscale data for one line in sequence, and a line latch circuit that holds the grayscale data for one line, which has been captured in the data latch circuit, at the same time in order to drive a plurality of data lines. If those latch circuits are disposed separately, as the number of bits of grayscale data for one pixel increases, the number of wiring lines connecting those latch circuits increases. Accordingly, there arises a problem in that it becomes difficult to dispose a latch element that latches the grayscale data to be supplied to one pixel in the width of the one pixel of the display panel.
As the related art, JP-A-2014-186083 (paragraphs 0004 to 0011 and FIG. 1) discloses a latch circuit of a display device with the purpose of solving the above-described problem by changing the layouts of the data latch circuit and the line latch circuit. In the display device, data for M pixels are output for each pixel in time division in order to drive each of the M pixels that are in one line of the display panel on the basis of N-bit data. Also, N latch circuits are disposed in the column direction and M latch circuits are disposed in the row direction, and each of the latch circuits includes M×N one-bit latch circuits each of which latches one-bit data.
Each of the M×N one-bit latch circuits includes a data latch unit circuit that latches any one-bit data in the N bits at different timing for each row, a line latch unit circuit that latches the data from the data latch unit circuit at the same time for each row, and an output enable element that outputs the data from the line latch unit circuit on the basis of an enable signal that selects any one column. With JP-A-2014-186083, the data latch unit circuit and the line latch unit circuit are disposed adjacently, and thus it is possible to make the wiring line between both of the latch unit circuits shortest.
However, in the display device according to JP-A-2014-186083, it is also necessary to have a data latch circuit that captures grayscale data for one line in sequence, and a line latch circuit that simultaneously holds the grayscale data for one line, which has been captured by the data latch circuit, in order to drive a data line.